Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Tulipse: A Visualization Framework for User-Guided Parallelization.

Y. Wong, T. Dubrownik, W. Tang, W. Tan, R. Duan, R. Goh, S. Kuo, S. Turner, and W. Wong. Euro-Par, volume 7484 of Lecture Notes in Computer Science, page 4-15. Springer, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Gebhard Waizmann University of Stuttgart

Alexander Waigum University of Stuttgart

Dr. -Ing. Christian Waidmann University of Stuttgart

Aamir Iqbal Waidha University of Stuttgart

Kevin Waizenegger University of Stuttgart

Other publications of authors with the same name

Optimizing and auto-tuning scale-free sparse matrix-vector multiplication on Intel Xeon Phi.W. Tang, R. Zhao, M. Lu, Y. Liang, H. Huyng, X. Li, and R. Goh. CGO, page 136-145. IEEE Computer Society, (2015)Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes.W. Tang, W. Tan, R. Ray, Y. Wong, W. Chen, S. Kuo, R. Goh, S. Turner, and W. Wong. SC, page 26:1-26:12. ACM, (2013)Tulipse: A Visualization Framework for User-Guided Parallelization.Y. Wong, T. Dubrownik, W. Tang, W. Tan, R. Duan, R. Goh, S. Kuo, S. Turner, and W. Wong. Euro-Par, volume 7484 of Lecture Notes in Computer Science, page 4-15. Springer, (2012)Ladder queue: An O(1) priority queue structure for large-scale discrete event simulation.W. Tang, R. Goh, and I. Thng. ACM Trans. Model. Comput. Simul., 15 (3): 175-204 (2005)Exploiting Sparsity to Accelerate Fully Connected Layers of CNN-Based Applications on Mobile SoCs.X. Xie, D. Du, Q. Li, Y. Liang, W. Tang, Z. Ong, M. Lu, H. Huynh, and R. Goh. ACM Trans. Embedded Comput. Syst., 17 (2): 37:1-37:25 (2018)Optimizing and Auto-Tuning Iterative Stencil Loops for GPUs with the In-Plane Method.W. Tang, W. Tan, R. Krishnamoorthy, Y. Wong, S. Kuo, R. Goh, S. Turner, and W. Wong. IPDPS, page 452-462. IEEE Computer Society, (2013)A Family of Bit-Representation-Optimized Formats for Fast Sparse Matrix-Vector Multiplication on the GPU.W. Tang, W. Tan, R. Goh, S. Turner, and W. Wong. IEEE Trans. Parallel Distrib. Syst., 26 (9): 2373-2385 (2015)A System-Level Simulator for RRAM-Based Neuromorphic Computing Chips.M. Lee, Y. Cui, T. Somu, T. Luo, J. Zhou, W. Tang, W. Wong, and R. Goh. ACM Trans. Archit. Code Optim., 15 (4): 64:1-64:24 (2019)A Code Generation Framework for Targeting Optimized Library Calls for Multiple Platforms.W. Tan, W. Tang, R. Goh, S. Turner, and W. Wong. IEEE Trans. Parallel Distrib. Syst., 26 (7): 1789-1799 (2015)Automatic Refactoring of Legacy Fortran Code to the Array Slicing Notation.C. Rajaseharan, W. Tan, W. Tang, S. Turner, S. Kuo, R. Goh, and W. Wong. ICPADS, page 698-699. IEEE Computer Society, (2012)