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Disambiguation of "Hansson, Andreas"

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Exploring system performance using elastic traces: Fast, accurate and portable.

, , , , and . SAMOS, page 96-105. IEEE, (2016)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Prof. Dr. Andreas Hotho

Ontology-based Text Document Clustering., , and . KI, 16 (4): 48-54 (2002)
Ontology-based Text Document Clustering., , and . KI, 16 (4): 48-54 (2002)Clustern mit Hintergrundwissen.. Karlsruhe Institute of Technology, (2004)

Junior-Prof. Dr.-Ing. Andreas Pott

Andreas Kaufmann

Andreas Pahler University of Stuttgart

Hon. -Prof. Dr. -Ing. Andreas Pott University of Stuttgart

 

Other publications of authors with the same name

Multi-processor programming in the embedded system curriculum., , and . SIGBED Review, 6 (1): 9 (2009)A monitoring-aware network-on-chip design flow., , , and . Journal of Systems Architecture - Embedded Systems Design, 54 (3-4): 397-410 (2008)Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones., , , , and . ISLPED, page 165-170. IEEE, (2015)Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases., and . NOCS, page 233-242. IEEE Computer Society, (2007)Design and implementation of an operating system for composable processor sharing., , , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 35 (2): 246-260 (2011)Fronthaul-Aware Scheduling Strategies for Next Generation RANs., , , and . GLOBECOM, page 1-6. IEEE, (2021)Simulating DRAM controllers for future system architecture exploration., , , , and . ISPASS, page 201-210. IEEE Computer Society, (2014)Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip., , and . VLSI Design, (2007)A unified approach to constrained mapping and routing on network-on-chip architectures., , and . CODES+ISSS, page 75-80. ACM, (2005)Enabling application-level performance guarantees in network-based systems on chip by applying dataflow analysis., , , , and . IET Computers & Digital Techniques, 3 (5): 398-412 (2009)