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Disambiguation of "Tan, Sheldon X.-D."

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An efficient decoupling capacitance optimization using piecewise polynomial models.

, , , , and . DATE, page 1190-1195. IEEE, (2009)

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Xiangyin Tan University of Stuttgart

D. Marino

Chensheng Xu University of Stuttgart

Yifan Xie University of Stuttgart

Boyu Xian University of Stuttgart

 

Other publications of authors with the same name

Fast analysis of nontree-clock network considering environmental uncertainty by parameterized and incremental macromodeling., , and . ASP-DAC, page 379-384. IEEE, (2009)Architecture-level thermal behavioral characterization for multi-core microprocessors., , and . ASP-DAC, page 456-461. IEEE, (2008)Fast Decoupling Capacitor Budgeting for Power/Ground Network Using Random Walk Approach., , , , , and . ASP-DAC, page 751-756. IEEE Computer Society, (2007)Time-domain performance bound analysis for analog and interconnect circuits considering process variations., , , and . ASP-DAC, page 455-460. IEEE, (2014)Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (11): 2402-2412 (2006)Efficient very large scale integration power/ground network sizing based on equivalent circuit modeling., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 22 (3): 277-284 (2003)Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 22 (12): 1678-1684 (2003)EM-Based On-Chip Aging Sensor for Detection of Recycled ICs., , and . IEEE Design & Test, 33 (5): 56-64 (2016)Parallel GMRES solver for fast analysis of large linear dynamic systems on GPU platforms., , , , , and . Integration, (2016)Fast timing analysis of clock networks considering environmental uncertainty., , and . Integration, 45 (4): 376-387 (2012)