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Hybrid CMOS/magnetic Process Design Kit and SOT-based non-volatile standard cell architectures., , and . ASP-DAC, page 692-699. IEEE, (2014)InMRAM: Introductory course on Magnetic Random Access Memories for microelectronics students and engineers., , and . EWME, page 21-25. IEEE, (2014)High density SOT-MRAM memory array based on a single transistor., , , and . NVMTS, page 1-3. IEEE, (2018)Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis., , , , , , and . ISCAS, page 1-5. IEEE, (2019)Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers., , , , , and . IEEE Access, (2019)Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability Issues., , , , , , , , and . IOLTS, page 243-244. IEEE, (2018)Ultra-low power volatile and non-volatile asynchronous circuits using back-biasing., , , and . ECCTD, page 1-4. IEEE, (2015)Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories., , , , , , , , , and 2 other author(s). JETC, 12 (4): 32:1-32:24 (2016)Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology., , , , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 83-91. Springer, (2011)Non-volatile FPGAs based on spintronic devices., , , and . DAC, page 126:1-126:3. ACM, (2013)