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A Hybrid PRAM and STT-RAM Cache Architecture for Extending the Lifetime of PRAM Caches.

, and . IEEE Comput. Archit. Lett., 12 (2): 55-58 (2013)

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Low-energy off-chip SDRAM memory systems for embedded applications., , , , and . ACM Trans. Embedded Comput. Syst., 2 (1): 98-130 (2003)Energy exploration and reduction of SDRAM memory systems., , , , , and . DAC, page 892-897. ACM, (2002)Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory., , , and . DAC, page 716-719. IEEE, (2007)A Hybrid PRAM and STT-RAM Cache Architecture for Extending the Lifetime of PRAM Caches., and . IEEE Comput. Archit. Lett., 12 (2): 55-58 (2013)Web-Based Energy Exploration Tool for Embedded Systems., , , , , , , and . IEEE Design & Test of Computers, 21 (6): 572-586 (2004)Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling., , , , and . ISLPED, page 309-314. ACM, (2008)Rapid Prototyping and Evaluation of Intelligence Functions of Active Storage Devices., , , , and . IEEE Trans. Computers, 63 (9): 2356-2368 (2014)Energy and Performance Optimization of Demand Paging With OneNAND Flash., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (11): 1969-1982 (2008)An energy characterization platform for memory devices and energy-aware data compression for multilevel-cell flash memory., , , , and . ACM Trans. Design Autom. Electr. Syst., 13 (3): 43:1-43:29 (2008)Exploiting I/O Reordering and I/O Interleaving to Improve Application Launch Performance., , and . TOS, 13 (1): 8:1-8:17 (2017)