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Disambiguation of "Nanya, Takashi"

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A floorplan method for asynchronous circuits with bundled-data implementation on FPGAs.

, , , and . ISCAS, page 925-928. IEEE, (2010)

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Other publications of authors with the same name

A Note on Strongly Fault-Secure Sequential Circuits., and . IEEE Trans. Computers, 36 (9): 1121-1123 (1987)An optimal solution for caching multimedia objects in transcoding proxies., , , and . Computer Communications, 30 (8): 1802-1810 (2007)Stuck-at-fault testing for quasi-delay-insensitive logic circuits., and . Systems and Computers in Japan, 29 (2): 19-27 (1998)Design Method of High Performance and Low Power Functional Units Considering Delay Variations., , , , and . IEICE Transactions, 89-A (12): 3519-3528 (2006)Verification of asynchronous logic circuit design using process algebra., , and . Systems and Computers in Japan, 28 (8-9): 33-43 (1997)Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units., , , , , and . DATE, page 10276-10281. IEEE Computer Society, (2003)Hierarchical Adaptive Distributed System-Level Diagnosis Applied for SNMP-based Network Fault Management., and . SRDS, page 98-107. IEEE Computer Society, (1996)Multiple stuck-at fault testability of self-testing checkers., , and . FTCS, page 381-386. IEEE Computer Society, (1988)Non-Broadcast Network Fault-Monitoring Based on System-Level Diagnosis., , , and . Integrated Network Management, volume 86 of IFIP Conference Proceedings, page 597-609. Chapman & Hall, (1997)A Scenario of Tolerating Interaction Faults Between Otherwise Correct Systems., and . PRDC, page 371-372. IEEE Computer Society, (2006)