Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Evaluating Alternative Implementations for LDPC Decoder Check Node Function.

T. Theocharides, G. Link, E. Swankoski, N. Vijaykrishnan, M. Irwin, and H. Schmit. ISVLSI, page 77-82. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Vijaykrishnan, Narayanan

add a person with the name Vijaykrishnan, Narayanan

Other publications of authors with the same name

An integer linear programming-based tool for wireless sensor networks.I. Kadayif, M. Kandemir, N. Vijaykrishnan, and M. Irwin. J. Parallel Distrib. Comput., 65 (3): 247-260 (2005)Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues.A. Gayasen, N. Vijaykrishnan, M. Kandemir, and A. Rahman. IEEE Trans. VLSI Syst., 16 (7): 882-893 (2008)Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers.T. Ragheb, A. Ricketts, M. Mondal, S. Kirolos, G. Link, V. Narayanan, and Y. Massoud. IEEE Trans. on Circuits and Systems, 56-I (2): 374-383 (2009)Java Runtime Systems: Characterization and Architectural Implications.R. Radhakrishnan, N. Vijaykrishnan, L. John, A. Sivasubramaniam, J. Rubio, and J. Sabarinathan. IEEE Trans. Computers, 50 (2): 131-146 (2001)Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications.K. Ma, X. Li, S. Li, Y. Liu, J. Sampson, Y. Xie, and V. Narayanan. IEEE Micro, 35 (5): 32-40 (2015)Tunnel FET RF Rectifier Design for Energy Harvesting Applications.H. Liu, X. Li, R. Vaddi, K. Ma, S. Datta, and V. Narayanan. IEEE J. Emerg. Sel. Topics Circuits Syst., 4 (4): 400-411 (2014)Energy-performance trade-offs for spatial access methods on memory-resident data.N. An, S. Gurumurthi, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, and M. Irwin. VLDB J., 11 (3): 179-197 (2002)Simultaneous memory and bus partitioning for SoC architectures.S. Srinivasan, F. Angiolini, M. Ruggiero, L. Benini, and N. Vijaykrishnan. SoCC, page 125-128. IEEE, (2005)Performance Improvements through Timing Driven Reconfiguration of Black-Boxes in Platform FPGAs.P. Sundararajan, S. Krishnamurthy, N. Vijaykrishnan, K. Chaudhary, and R. Jayaraman. SoCC, page 105-106. IEEE, (2006)DRAM Energy Management Using Software and Hardware Directed Power Mode Control.V. Delaluz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, and M. Irwin. HPCA, page 159-169. IEEE Computer Society, (2001)

PUMA

Disambiguation of "Vijaykrishnan, Narayanan"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Evaluating Alternative Implementations for LDPC Decoder Check Node Function.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Vijaykrishnan, Narayanan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Evaluating Alternative Implementations for LDPC Decoder Check Node Function.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Evaluating Alternative Implementations for LDPC Decoder Check Node Function.