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The Design Challenges of IoT: From System Technologies to Ultra-Low Power Circuits.

, , , , , and . IEICE Transactions, 100-C (6): 515-522 (2017)

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An energy-efficient polar transmitter for IEEE 802.15.6 body area networks: system requirements and circuit designs., , , , and . IEEE Communications Magazine, 50 (10): 118 (2012)A circuit-design-driven tool with a hybrid automation approach for SAR ADCs in IoT., , , , , , , and . DATE, page 672-675. IEEE, (2018)An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS., , , , , , , , and . IEEE Trans. on Circuits and Systems, 64-I (5): 1094-1105 (2017)Frequency-Tracking CW Doppler Radar Solving Small-Angle Approximation and Null Point Issues in Non-Contact Vital Signs Monitoring., , , , , and . IEEE Trans. Biomed. Circuits and Systems, 11 (3): 671-680 (2017)24.7 A 673µW 1.8-to-2.5GHz dividerless fractional-N digital PLL with an inherent frequency-capture capability and a phase-dithering spur mitigation for IoT applications., , , , , , , and . ISSCC, page 420-421. IEEE, (2017)A fast convergence two-stage AGC for a Bluetooth low energy radio with 84dB tuning range., , , , and . PIMRC, page 1921-1925. IEEE, (2014)A 8mW-RX/113mW-TX, Sub-GHz SoC with time-dithered PA ramping for LPWAN applications., , , , , , , , , and 5 other author(s). ESSCIRC, page 376-379. IEEE, (2017)Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs., , , , , , , , and . ESSCIRC, page 283-286. IEEE, (2015)An energy-efficient super-regenerative ASK receiver with a ΔΣ-based pulse-width demodulator., , and . A-SSCC, page 369-372. IEEE, (2011)A 2.7nJ/b multi-standard 2.3/2.4GHz polar transmitter for wireless sensor networks., , , , , , and . ISSCC, page 448-450. IEEE, (2012)