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Low-Power Manycore Accelerator for Personalized Biomedical Applications., , , , and . ACM Great Lakes Symposium on VLSI, page 63-68. ACM, (2016)Task Scheduling for GPU Accelerated Hybrid OLAP Systems with Multi-core Support and Text-to-Integer Translation., , , and . IPDPS Workshops, page 1987-1996. IEEE Computer Society, (2012)Heterogeneous Scheduling of Deep Neural Networks for Low-power Real-time Designs., and . ACM J. Emerg. Technol. Comput. Syst., 15 (4): 36:1-36:31 (2019)SPARCNet: A Hardware Accelerator for Efficient Deployment of Sparse Convolutional Networks., , , and . ACM J. Emerg. Technol. Comput. Syst., 13 (3): 31:1-31:32 (2017)Accelerating Convolutional Neural Network With FFT on Embedded Hardware., , , and . IEEE Trans. VLSI Syst., 26 (9): 1737-1749 (2018)Low Overhead CS-Based Heterogeneous Framework for Big Data Acceleration., , , , and . ACM Trans. Embedded Comput. Syst., 17 (1): 25:1-25:25 (2018)CS-Based Secured Big Data Processing on FPGA., , , and . FCCM, page 201. IEEE Computer Society, (2016)Task scheduling for GPU accelerated OLAP systems., , , and . CASCON, page 107-119. IBM / ACM, (2011)Statistical estimation of T1 relaxation times using conventional magnetic resonance imaging., , , , , , , and . NeuroImage, (2016)SCALENet: A SCalable Low power AccELerator for Real-time Embedded Deep Neural Networks., , and . ACM Great Lakes Symposium on VLSI, page 129-134. ACM, (2018)