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Fast Tag Comparator Using Diode Partitioned Domino for 64-bit Microprocessors.

, , and . IEEE Trans. on Circuits and Systems, 54-I (2): 322-328 (2007)

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A High-Density Subthreshold SRAM with Data-Independent Bitline Leakage and Virtual Ground Replica Scheme., , , and . ISSCC, page 330-606. IEEE, (2007)An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of VMIN Degradation., , and . IEEE Trans. on Circuits and Systems, 59-I (3): 584-593 (2012)Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design., , , , , and . IEEE Micro, 34 (6): 74-85 (2014)An 8T Subthreshold SRAM Cell Utilizing Reverse Short Channel Effect for Write Margin and Read Performance Improvement., , and . CICC, page 241-244. IEEE, (2007)Tutorial 2: Low Voltage Circuit Design Techniques for Sub-32nm Technologies.. ISQED, page 4. IEEE Computer Society, (2008)A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches., , , and . J. Solid-State Circuits, 47 (2): 547-559 (2012)A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory., , , , , and . J. Solid-State Circuits, 48 (2): 598-610 (2013)Beat Frequency Detector-Based High-Speed True Random Number Generators: Statistical Modeling and Analysis., , , and . JETC, 13 (1): 9:1-9:25 (2016)CoMET: Composite-Input Magnetoelectric-based Logic Technology., , , , , and . CoRR, (2016)Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor., , , , , , and . Proceedings of the IEEE, 103 (1): 106-130 (2015)