PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Tadros, Ramy N."

Author of the publication

copydeleteadd this publication to your clipboard
A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networks.

, , , and . ISCAS, page 1520-1523. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jan-Philipp Negel

Thin-disk multipass amplifier for fs pulses delivering 400 W of average and 2.0 GW of peak power for linear polarization as well as 235 W and 1.2 GW for radial polarization, , , , , , , and . Applied Physics. B, Lasers and optics, 123 (5): 156 (2017)

Cornelius Nawrath University of Stuttgart

InAs/GaAs quantum dots as sources of non-classical light in the telecom wavelength regime. Universität Stuttgart, München, Dissertation, (2023)

Univ. -Prof. Dr. -Ing. Wolfgang Nowak University of Stuttgart

Comparison of Four Competing Invasion Percolation Models for Gas Flow in Porous Media, , , , and . Preprint, (2023)

none

Pierre Nacke University of Stuttgart

 

Other publications of authors with the same name

A Low-Power Low-Area Error-Detecting Latch for Resilient Architectures in 28-nm FDSOI., , , , and . IEEE Trans. on Circuits and Systems, 63-II (9): 858-862 (2016)Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications., , , , , and . ASYNC, page 11-18. IEEE Computer Society, (2016)A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networks., , , and . ISCAS, page 1520-1523. IEEE, (2014)Low-power all-digital manchester-encoding-based high-speed serdes transceiver for on-chip networks., , , and . ISCAS, page 2752-2755. IEEE, (2014)A Fine-Grained, Uniform, Energy-Efficient Delay Element for FD-SOI Technologies., , , , and . ISVLSI, page 27-32. IEEE Computer Society, (2015)Low Area, Low Power, Robust, Highly Sensitive Error Detecting Latch for Resilient Architectures., , and . ISLPED, page 16-21. ACM, (2016)A Robust and Self-Adaptive Clocking Technique for RSFQ Circuits - The Architecture., and . ISCAS, page 1-5. IEEE, (2018)A 24 Gbps SerDes transceiver for on-chip networks using a new half-data-rate self-timed 3-level signaling scheme., , , and . ICEAC, page 1-4. IEEE, (2015)A Fine-Grain, Uniform, Energy-Efficient Delay Element for 2-Phase Bundled-Data Circuits., , , , and . JETC, 13 (2): 15:1-15:23 (2016)