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Disambiguation of "Singh, Eshan"

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Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions.

, , , and . IEEE Design & Test, 33 (6): 55-62 (2016)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Arijit Singha Hazari University of Stuttgart

Prakhar Singhal University of Stuttgart

Shivendra Singh Parihar University of Stuttgart

Prabal Singh Verma University of Stuttgart

 

Other publications of authors with the same name

Impact of Radial defect clustering on 3D stacked IC yield from wafer to wafer stacking.. ITC, page 1-7. IEEE Computer Society, (2012)E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods., , and . CAV (2), volume 10427 of Lecture Notes in Computer Science, page 104-125. Springer, (2017)Modeling location based wafer die yield variation in estimating 3D stacked IC yield from wafer to wafer stacking.. VTS, page 1-6. IEEE Computer Society, (2014)A structured approach to post-silicon validation and debug using symbolic quick error detection., , , and . ITC, page 1-10. IEEE, (2015)Exploiting rotational symmetries for improved stacked yields in W2W 3D-SICs.. VTS, page 32-37. IEEE Computer Society, (2011)Analytical Modeling of 3D Stacked IC Yield from Wafer to Wafer Stacking with Radial Defect Clustering.. VLSI Design, page 26-31. IEEE Computer Society, (2014)Logic Bug Detection and Localization Using Symbolic Quick Error Detection., , , and . CoRR, (2017)Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions., , , and . IEEE Design & Test, 33 (6): 55-62 (2016)Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study., , , , , , , , , and 1 other author(s). DATE, page 1000-1005. IEEE, (2019)