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Disambiguation of "Murgai, Rajeev"

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Clock Distribution Architectures: A Comparative Study.

, , , , , , , and . ISQED, page 85-91. IEEE Computer Society, (2006)

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Other publications of authors with the same name

Technology-Dependent Logic Optimization.. Proceedings of the IEEE, 103 (11): 2004-2020 (2015)On Reducing Transitions Through Data Modifications., and . DATE, page 82-. IEEE Computer Society / ACM, (1999)Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network., , , , , , , , , and 2 other author(s). DATE, page 537-540. ACM, (2008)Efficient global fanout optimization algorithms.. ASP-DAC, page 571-576. ACM, (2001)On Clustering for Minimum Delay/Area., , and . ICCAD, page 6-9. IEEE Computer Society, (1991)Sequential Synthesis for Table Look Up Programmable Gate Arrays., , and . DAC, page 224-229. ACM Press, (1993)Design and Analysis of "Tree+Local Meshes" Clock Architecture., and . ISQED, page 165-170. IEEE Computer Society, (2007)PDL: A New Physical Synthesis Methodology., , , , and . ISQED, page 348-354. IEEE Computer Society, (2003)Complexity Of Minimum-Delay Gate Resizing., and . VLSI Design, page 425-430. IEEE Computer Society, (2001)Delay-Constrained Area Recovery Via Layout-Driven Buffer Optimization.. VLSI Design, page 240-. IEEE Computer Society, (2000)