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A biomimetic nanoelectronic neuron with enhanced spike timing.

, and . ISCAS, page 1560-1563. IEEE, (2014)

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Novel Circuit-Level Model for Gate Oxide Short and its Testing Method in SRAMs., , and . IEEE Trans. VLSI Syst., 22 (6): 1294-1307 (2014)Fast Simulation of Optical Burst Switching Networks Using Simulated Annealing., , and . MASCOTS, page 283-292. IEEE Computer Society, (2006)A biomimetic nanoelectronic neuron with enhanced spike timing., and . ISCAS, page 1560-1563. IEEE, (2014)High speed c-means clustering in reconfigurable hardware., , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 34 (6): 237-246 (2010)Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs., , and . VTS, page 1-6. IEEE Computer Society, (2013)Efficient K-Means VLSI Architecture for Vector Quantization., , , and . SCIA, volume 5575 of Lecture Notes in Computer Science, page 440-449. Springer, (2009)An Automatic Framework for Efficient Software Performance Evaluation and Optimization., and . Annual Simulation Symposium, page 99-105. IEEE Computer Society, (2007)An Adaptive Approach to Fast Simulation of Traffic Groomed Optical Networks., and . Winter Simulation Conference, page 612-620. IEEE Computer Society, (2004)An adaptive approach to accelerated evaluation of highly available services., and . ACM Trans. Model. Comput. Simul., 18 (1): 1:1-1:26 (2007)Dynamic spike threshold and nonlinear dendritic computation for coincidence detection in neuromorphic circuits., and . EMBC, page 461-464. IEEE, (2014)