PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Rousseau, Frédéric"

Author of the publication

copydeleteadd this publication to your clipboard
Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems.

, , and . FCCM, page 155-158. IEEE Computer Society, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Frederic Graeb University of Stuttgart

 

Other publications of authors with the same name

Acceleration for a compiled Transaction Level Modeling simulation., , and . ICECS, page 1176-1179. IEEE, (2006)Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems., , and . FCCM, page 155-158. IEEE Computer Society, (2015)EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems., , , , , , , , , and 4 other author(s). ISPA, page 182-189. IEEE Computer Society, (2014)Enhancing non-linear kernels by an optimized memory hierarchy in a High Level Synthesis flow., and . DATE, page 1130-1133. IEEE, (2012)Design of a pseudo-log image transform IP in an HLS-based memory management framework., , , and . Real-Time Image and Video Processing, volume 8656 of SPIE Proceedings, page 86560B. SPIE, (2013)Transaction Level Modeling in Hardware/Software System Design using .Net Framework., , , and . CCECE, page 140-143. IEEE, (2006)Towards a multi-formalism framework for architectural synthesis: the ASAR project., , , , , , , , , and 4 other author(s). CODES, page 25-32. IEEE Computer Society, (1994)A codesign experiment in acoustic echo cancellation GMDF., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 2 (4): 365-383 (1997)Me3D: A model-driven methodology expediting embedded device driver development., , , and . International Symposium on Rapid System Prototyping, page 171-177. IEEE, (2011)Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor Prototyping: New Challenges for Embedded Software Designers., , , and . IEEE International Workshop on Rapid System Prototyping, page 41-47. IEEE Computer Society, (2008)