Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Master-Slave Control Structure for Massively Parallel System on Chip., , , , and . DSD, page 917-924. IEEE Computer Society, (2013)Broadcast with mask on a massively parallel processing on a chip., , , , and . HPCS, page 275-280. IEEE, (2012)SCAC-Net: Reconfigurable Interconnection Network in SCAC Massively Parallel SoC., , , , and . PDP, page 759-762. IEEE Computer Society, (2016)Model Transformations for the Compilation of Multi-processor Systems-on-Chip., , and . GTTSE, volume 5235 of Lecture Notes in Computer Science, page 459-473. Springer, (2007)Multiple Abstraction Views of FPGA to Map Parallel Applications., , and . ReCoSoC, page 90-97. Univ. Montpellier II, (2007)UML2 as an ADL Hierarchichal Hardware Modeling., , and . IFIP-WADL, volume 176 of IFIP, page 133-147. Springer, (2004)Repetitive Allocation Modelling with MARTE., , , and . FDL, page 280-285. ECSI, (2007)A model-driven based framework for rapid parallel SoC FPGA prototyping., , , , and . International Symposium on Rapid System Prototyping, page 149-155. IEEE, (2011)Study and integration of a parametric neighbouring interconnection network in a massively parallel architecture on FPGA., , , and . AICCSA, page 368-373. IEEE Computer Society, (2009)Real-time systems for multiprocessor architectures., , , and . IPDPS, IEEE, (2006)