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Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform.

, , , , , , , and . International Symposium on Rapid System Prototyping, page 38-44. IEEE, (2011)

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Multimedia Instructions In IA-64., , and . ICME, IEEE Computer Society, (2001)Subword parallelism with MAX-2.. IEEE Micro, 16 (4): 51-59 (1996)Guest Editorial: Media processing: a new design target., and . IEEE Micro, 16 (4): 6-9 (1996)Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform., , , , , , , and . International Symposium on Rapid System Prototyping, page 38-44. IEEE, (2011)Challenges in the Design of Security-Aware Processors.. ASAP, page 2-. IEEE Computer Society, (2003)Forward-Secure Content Distribution to Reconfigurable Hardware., , , , and . ReConFig, page 450-455. IEEE Computer Society, (2008)How Bad is Suboptimal Rate Allocation?, , , and . INFOCOM, page 321-325. IEEE, (2008)Processor accelerator for AES., and . SASP, page 16-21. IEEE Computer Society, (2010)Physical attack protection with human-secure virtualization in data centers., , , and . DSN Workshops, page 1-6. IEEE Computer Society, (2012)Processor Architecture for Trustworthy Computers.. Asia-Pacific Computer Systems Architecture Conference, volume 3740 of Lecture Notes in Computer Science, page 1-2. Springer, (2005)