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Disambiguation of "Veeravalli, Varadan Savulimedu"

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Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example.

, , , , and . ICCD, page 61-67. IEEE Computer Society, (2014)

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Other publications of authors with the same name

An infrastructure for accurate characterization of single-event transients in digital circuits., , , , , , , , , and 2 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-A): 772-791 (2013)Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example., , , , and . ICCD, page 61-67. IEEE Computer Society, (2014)Study of a delayed single-event effect in the Muller C-element., and . ETS, page 1-2. IEEE, (2016)Design and Physical Implementation of a Target ASIC for SET Experiments., and . DSD, page 694-697. IEEE Computer Society, (2016)Architecture for monitoring SET propagation in 16-bit Sklansky adder., and . ISQED, page 412-419. IEEE, (2014)Building reliable systems-on-chip in nanoscale technologies., , , , , , and . Elektrotechnik und Informationstechnik, 132 (6): 301-306 (2015)Radiation-tolerant combinational gates - an implementation based comparison., and . DDECS, page 115-120. IEEE, (2012)Measuring SET pulsewidths in logic gates using digital infrastructure., , and . ISQED, page 236-242. IEEE, (2014)Modular Redundancy in a GALS System Using Asynchronous Recovery Links., and . ASYNC, page 23-30. IEEE Computer Society, (2013)Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement Chip., , , and . DSD, page 8-17. IEEE Computer Society, (2012)