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Disambiguation of "Cerny, Eduard"

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Semantics and verification of action diagrams with linear timing.

, and . ACM Trans. Design Autom. Electr. Syst., 3 (1): 21-50 (1998)

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Dr. -Ing. Eduard Rott University of Stuttgart

 

Other publications of authors with the same name

MDG-Based State Enumeration By Retiming And Circuit Transformation., , , , and . Journal of Circuits, Systems, and Computers, 13 (5): 1111-1132 (2004)Local microcode generation in system design., , , and . Code Generation for Embedded Processors, page 171-187. Kluwer, (1994)Synthesis of Minimal Binary Decision Trees., , and . IEEE Trans. Computers, 28 (7): 472-482 (1979)Self-Adjusting Networks for VLSI Simulation., and . IEEE Trans. Computers, 36 (9): 1114-1120 (1987)An Approach to Unified Methodology of Combinational Switching Circuits., and . IEEE Trans. Computers, 26 (8): 745-756 (1977)Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs)., , , and . Comput. J., 47 (1): 71-84 (2004)Some Experience with the Use of Formal Specifications., , , , , , , , and . PSTV, page 171-185. North-Holland, (1982)A Test Design Methodology for Protocol Testing., , and . IEEE Trans. Software Eng., 13 (5): 518-531 (1987)Semantics and verification of action diagrams with linear timing., and . ACM Trans. Design Autom. Electr. Syst., 3 (1): 21-50 (1998)Some issues in protocol implementation testing.. Computer Communication Review, 14 (2): 259-260 (1984)