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Disambiguation of "Fesquet, Laurent"

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Modeling and Design of Asynchronous Priority Arbiters for On-Chip Communication Systems.

, , , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 313-324. Kluwer, (2001)

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Dr. Laurent Helden University of Stuttgart

 

Other publications of authors with the same name

Spectral analysis of a signal driven sampling scheme., , and . EUSIPCO, page 1-5. IEEE, (2006)IIR digital filtering of non-uniformly sampled signals via state representation., and . Signal Processing, 90 (10): 2811-2821 (2010)A New Class of Asynchronous A/D Converters Based on Time Quantization., , , and . ASYNC, page 196-205. IEEE Computer Society, (2003)Static Timing Analysis of Asynchronous Bundled-Data Circuits., , , and . ASYNC, page 110-118. IEEE Computer Society, (2018)Detection of Layout-Level Trojans by Monitoring Substrate with Preexisting Built-in Sensors., , and . ISVLSI, page 290-295. IEEE Computer Society, (2017)C-elements for Hardened Self-timed Circuits., , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 247-256. Springer, (2011)Implementing Snoop-Coherence Protocol for Future SMP Architectures., , and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 745-752. Springer, (1999)Strategy for higher education in electronic circuits and systems in the perspective of the up-coming digital society., , and . LASCAS, page 1-4. IEEE, (2018)An Asynchronous Fixed Priority Arbiter for High througput Time Correlated Single Photon Counting Systems., , , and . ICECS, page 765-768. IEEE, (2018)A Digital Event-Based Strategy for ASK demodulation., , and . VLSI-SoC, page 244-245. IEEE, (2019)