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Disambiguation of "Frustaci, Fabio"

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HW/SW Codesign for Approximation-Aware Binary Neural Networks

, , , , , and . IEEE journal on emerging and selected topics in circuits and systems, 13 (1): 33-47 (2023)
DOI: 10.1109/JETCAS.2023.3243267

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Fabio Musco University of Stuttgart

Fabio Magnago Lampugnani University of Stuttgart

 

Other publications of authors with the same name

Techniques for Leakage Energy Reduction in Deep Submicrometer Cache Memories., , , and . IEEE Trans. VLSI Syst., 14 (11): 1238-1249 (2006)Design of efficient QCA multiplexers., , , and . I. J. Circuit Theory and Applications, 44 (3): 602-615 (2016)Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation., , , and . IEEE Trans. VLSI Syst., 27 (4): 964-968 (2019)Designing Fast Convolutional Engines for Deep Learning Applications., , , and . ICECS, page 753-756. IEEE, (2018)A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation., , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 277-286. Springer, (2008)Leakage energy reduction techniques in deep submicron cache memories: a comparative study., , , and . ISCAS, IEEE, (2006)Impact of Process Variations on Flip-Flops Energy and Timing Characteristics., , , , and . ISVLSI, page 458-459. IEEE Computer Society, (2010)Design of Real-Time FPGA-based Embedded System for Stereo Vision., , , and . ISCAS, page 1-5. IEEE, (2018)Low-Leakage SRAM Wordline Drivers for the 28-nm UTBB FDSOI Technology., , and . IEEE Trans. VLSI Syst., 23 (12): 3133-3137 (2015)Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology., , and . ICCD, page 499-504. IEEE Computer Society, (2015)