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Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry., , , , , , , , , and 15 other author(s). J. Solid-State Circuits, 48 (1): 46-65 (2013)A full 4-channel 60 GHz direct-conversion transceiver., , , , , , , , , and . ASP-DAC, page 95-96. IEEE, (2013)A fractional-N sub-sampling PLL using a pipelined phase-interpolator with a FoM of -246dB., , , , , , , , and . ESSCIRC, page 380-383. IEEE, (2015)A MOS Transistor-Array for Accurate Measurement of Subthreshold Leakage Variation., , , , , , and . ISQED, page 21-26. IEEE Computer Society, (2007)A 64μs Start-Up 26/40MHz Crystal Oscillator with Negative Resistance Boosting Technique Using Reconfigurable Multi-Stage Amplifier., , , and . VLSI Circuits, page 115-116. IEEE, (2018)An LC-DCO based synthesizable injection-locked PLL with an FoM of -250.3dB., , , , , and . ESSCIRC, page 197-200. IEEE, (2016)The study of the knowledge optimization tool., and . GEC Summit, page 443-450. ACM, (2009)64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay., , , , , , , , , and 14 other author(s). J. Solid-State Circuits, 52 (11): 2871-2891 (2017)A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS., , , , , , , , , and 1 other author(s). IEICE Transactions, 101-C (2): 126-134 (2018)Jussi Ryynänen Introduction to the December Special Issue on the 2015 IEEE International Solid-State Circuits Conference., , , , and . J. Solid-State Circuits, 50 (12): 2799-2803 (2015)