PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Macchiarulo, Luca"

Author of the publication

copydeleteadd this publication to your clipboard
Functional Decomposition through Structural Analysis of Decision Diagrams - the Binary and Multiple-Valued Cases.

, and . VLSI Design, page 218-. IEEE Computer Society, (1999)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Luca Remke University of Stuttgart

Luca Di Grazia University of Stuttgart

Philipp Luca Reiser University of Stuttgart

Dr. Simone Luca Portalupi University of Stuttgart

Gian-Luca Iglesias Lopez University of Stuttgart

 

Other publications of authors with the same name

Pipelining Sequential Circuits with Wave Steering., , and . IEEE Trans. Computers, 53 (9): 1205-1210 (2004)Issues in Implementing Latency Insensitive Protocols., and . DATE, page 1390-1391. IEEE Computer Society, (2004)A jumper insertion algorithm under antenna ratio and timing constraints., and . ICCAD, page 290-297. IEEE Computer Society, (2011)New techniques for efficiently assessing reliability of SOCs., , , , and . Microelectronics Journal, 34 (1): 53-61 (2003)Enhanced clustered voltage scaling for low power., , , , and . ACM Great Lakes Symposium on VLSI, page 18-23. ACM, (2002)A comparison between mask- and field-programmable routing structures on industrial FPGA architectures., , and . ACM Great Lakes Symposium on VLSI, page 436-439. ACM, (2004)Wire Placement for Crosstalk Energy Minimization in Address Buses., , and . DATE, page 158-162. IEEE Computer Society, (2002)On-the-fly layout generation for PTL macrocells., , and . DATE, page 546-551. IEEE Computer Society, (2001)A New System Design Methodology for Wire Pipelined SoC., and . DATE, page 944-945. IEEE Computer Society, (2005)A novel high throughput reconfigurable FPGA architecture., , , and . FPGA, page 22-29. ACM, (2000)