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Analysis of path profiling information generated with performance monitoring hardware.

, , , , , , and . Interaction between Compilers and Computer Architectures, page 34-43. IEEE Computer Society, (2005)

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Analysis of path profiling information generated with performance monitoring hardware., , , , , , and . Interaction between Compilers and Computer Architectures, page 34-43. IEEE Computer Society, (2005)PLR: A Software Approach to Transient Fault Tolerance for Multicore Architectures., , , , and . IEEE Trans. Dependable Sec. Comput., 6 (2): 135-148 (2009)Dynamic run-time architecture techniques for enabling continuous optimization., , , , , , , , , and . Conf. Computing Frontiers, page 211-220. ACM, (2005)An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment., , , , and . AHS, page 250-257. IEEE Computer Society, (2007)Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance., , , , and . DSN, page 297-306. IEEE Computer Society, (2007)Into the wild: studying real user activity patterns to guide power optimizations for mobile architectures., , and . MICRO, page 168-178. ACM, (2009)Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction., , , , , , and . ISCA, page 427-438. IEEE Computer Society, (2008)Power to the people: Leveraging human physiological traits to control microprocessor frequency., , , , , , and . MICRO, page 188-199. IEEE Computer Society, (2008)Shadow Profiling: Hiding Instrumentation Costs with Parallelism., , , , and . CGO, page 198-208. IEEE Computer Society, (2007)Characterizing and modeling user activity on smartphones: summary., , , and . SIGMETRICS, page 375-376. ACM, (2010)