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A New Field-assisted Access Scheme of STT-RAM with Self-reference Capability.

, , , , , and . DAC, page 63:1-63:6. ACM, (2014)

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Progressive DNN Compression: A Key to Achieve Ultra-High Weight Pruning and Quantization Rates using ADMM., , , , , , , , , and 4 other author(s). CoRR, (2019)A holistic tri-region MLC STT-RAM design with combined performance, energy, and reliability optimizations., , , , , and . DATE, page 1285-1290. IEEE, (2016)Efficient LDPC Code Design for Combating Asymmetric Errors in STT-RAM., , and . JETC, 14 (1): 10:1-10:20 (2018)Tiny but Accurate: A Pruned, Quantized and Optimized Memristor Crossbar Framework for Ultra Efficient DNN Implementation., , , , , , , , and . CoRR, (2019)A fast and ultra low power time-based spiking neuromorphic architecture for embedded applications., and . ISQED, page 19-22. IEEE, (2017)NVSim-VXs: an improved NVSim for variation aware STT-RAM simulation., , , , , , and . DAC, page 70:1-70:6. ACM, (2016)Deep-evasion: Turn deep neural network into evasive self-contained cyber-physical malware: poster., and . WiSec, page 320-321. ACM, (2019)State-Restrict MLC STT-RAM Designs for High-Reliable High-Performance Memory System., , , and . DAC, page 35:1-35:6. ACM, (2014)Online Geographical Load Balancing for Energy-Harvesting Mobile Edge Computing., , , , and . ICC, page 1-6. IEEE, (2018)Defensive dropout for hardening deep neural networks under adversarial attacks., , , , , , and . ICCAD, page 71:1-71:8. ACM, (2018)