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The design and implementation of an efficient user-space in-memory file system., , , , , and . NVMSA, page 1-6. IEEE, (2016)Communication optimization for thermal reliable many-core systems: work-in-progress., , , and . CODES+ISSS, page 11:1-11:2. ACM, (2017)Designing an efficient persistent in-memory file system., , , , and . NVMSA, page 1-6. IEEE, (2015)Properties of Self-Timed Ring Architectures for Deadlock-Free and Consistent Configuration Reaching Maximum Throughput., , , , , and . Signal Processing Systems, 84 (1): 123-137 (2016)FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems., , , , , and . ASP-DAC, page 725-730. IEEE, (2016)On the Design of High-Performance and Energy-Efficient Probabilistic Self-Timed Systems., , , , and . HPCC/CSS/ICESS, page 260-265. IEEE, (2015)Efficient Data Placement for Improving Data Access Performance on Domain-Wall Memory., , , , , and . IEEE Trans. VLSI Syst., 24 (10): 3094-3104 (2016)The Design and Implementation of a High-Performance Hybrid Memory File System., , , , and . CBD, page 316-321. IEEE, (2016)Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search., , , , , , and . DAC, page 5. ACM, (2019)Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators., , , , , , and . CoRR, (2019)