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Disambiguation of "Henkel, Jörg"

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Dynamic thermal management in 3D multi-core architecture through run-time adaptation.

, , and . DATE, page 299-304. IEEE, (2011)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dr. phil. Christian Jörg University of Stuttgart

Fabian Jörg University of Stuttgart

Jörg Desel

Das ist Informatik (Eds.) Springer, (2001)

Jörg Förstner University of Stuttgart

Jörg Roth University of Stuttgart

 

Other publications of authors with the same name

Modeling and Mitigating Time-Dependent Variability From the Physical Level to the Circuit Level., , and . IEEE Trans. on Circuits and Systems, 66-I (7): 2671-2684 (2019)Modeling and Evaluating the Gate Length Dependence of BTI., , and . IEEE Trans. on Circuits and Systems, 66-II (9): 1527-1531 (2019)Self-Awareness in Systems on Chip, Part II.. IEEE Design & Test, 35 (5): 4 (2018)From the EIC: Circuits and Systems for VLSI IoT Devices.. IEEE Design & Test, 36 (4): 4 (2019)Scalable Dynamic Task Scheduling on Adaptive Many-Core., , , , and . MCSoC, page 168-175. IEEE Computer Society, (2018)Trace-driven system-level power evaluation of system-on-a-chip peripheral cores., , and . ASP-DAC, page 306-312. ACM, (2001)A hybrid approach for core-based system-level power modeling., , and . ASP-DAC, page 141-146. ACM, (2000)Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability., , , , , , , , , and . IRPS, page 6-1. IEEE, (2018)Dark Silicon: From Computation to Communication., , , , , , , , and . NOCS, page 23:1-23:8. ACM, (2015)A Fine-Grained Soft Error Resilient Architecture under Power Considerations., , and . DATE, page 972-975. IEEE, (2019)