PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Fei, Yunsi"

Author of the publication

copydeleteadd this publication to your clipboard
Differential Fault Analysis of SHA3-224 and SHA3-256.

, , , and . FDTC, page 4-15. IEEE Computer Society, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Xiao Fei University of Stuttgart

Carolin Feifel University of Stuttgart

Mathias Feinler University of Stuttgart

Dr. -Ing. Marius Feilhauer University of Stuttgart

 

Other publications of authors with the same name

TARS: A Traffic-Adaptive Receiver-Synchronized MAC Protocol for Underwater Sensor Networks., and . MASCOTS, page 1-10. IEEE Computer Society, (2015)System Clock and Power Supply Cross-Checking for Glitch Detection., , and . IACR Cryptology ePrint Archive, (2016)A Unified Metric for Quantifying Information Leakage of Cryptographic Devices under Power Analysis Attacks., , , and . IACR Cryptology ePrint Archive, (2016)Harnessing Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency., and . DATE, page 758-763. ACM, (2008)GPU acceleration of RSA is vulnerable to side-channel timing attacks., , and . ICCAD, page 113. ACM, (2018)A Statistical Model for DPA with Novel Algorithmic Confusion Analysis., , and . CHES, volume 7428 of Lecture Notes in Computer Science, page 233-250. Springer, (2012)Utilizing custom registers in application-specific instruction set processors for register spills elimination., and . ACM Great Lakes Symposium on VLSI, page 323-328. ACM, (2007)Resource Sharing of Pipelined Custom Hardware Extension for Energy-Efficient Application-Specific Instruction Set Processor Design., and . ACM Trans. Design Autom. Electr. Syst., 17 (4): 39:1-39:20 (2012)Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing., , and . IEEE Trans. VLSI Syst., 20 (3): 551-563 (2012)Compiler-assisted architectural support for program code integrity monitoring in application-specific instruction set processors., , , and . ICCD, page 187-193. IEEE, (2007)