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Disambiguation of "Kar, Monodeep"

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A Microwatt-Class Always-On Sensor Fusion Engine Featuring Ultra-Low-Power AOI Clocked Circuits in 14nm CMOS.

, , , , , , , , , , and . VLSI Circuits, page 50-. IEEE, (2019)

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Nikolaos Karadimitriou University of Stuttgart

Carsten Alexander Karthaus

Maximilian Karsch University of Stuttgart

T. Karcher

Julian Karst University of Stuttgart

 

Other publications of authors with the same name

Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering., , , , , and . J. Solid-State Circuits, 54 (2): 569-583 (2019)Reducing Side-Channel Leakage of Encryption Engines Using Integrated Low-Dropout Voltage Regulators., , , , , and . J. Hardware and Systems Security, 1 (4): 340-355 (2017)Blindsight: Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator., , , , , , , and . CoRR, (2018)Exploiting on-chip power management for side-channel security., , , , , and . DATE, page 401-406. IEEE, (2018)Impact of inductive integrated voltage regulator on the power attack vulnerability of encryption engines: A simulation study., , , , and . CICC, page 1-4. IEEE, (2014)Energy Efficient and Side-Channel Secure Cryptographic Hardware for IoT-Edge Nodes., , , , and . IEEE Internet of Things Journal, 6 (1): 421-434 (2019)A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling., , , , , , , , , and 34 other author(s). IEEE J. Solid State Circuits, 57 (1): 182-197 (2022)A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 56 (4): 1082-1092 (2021)Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOS., , , , , , , , , and 6 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)Autotuning of Integrated Inductive Voltage Regulator Using On-Chip Delay Sensor to Tolerate Process and Passive Variations., , , and . IEEE Trans. VLSI Syst., 27 (8): 1768-1778 (2019)