Author of the publication

Design of Low-Complexity FIR Filters Based on Signed-Powers-of-Two Coefficients With Reusable Common Subexpressions.

, , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (10): 1898-1907 (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Efficient structural adder pipelining in transposed form FIR filters., , , and . DSP, page 311-314. IEEE, (2015)A unified 2n-1, 2n, 2n+1 RNS scaler with dual scaling constants., , and . APCCAS, page 296-299. IEEE, (2012)A post-processing scan-chain watermarking scheme for VLSI intellectual property protection., and . APCCAS, page 412-415. IEEE, (2012)A MSB-biased self-organizing feature map for still color image compression., , and . APCCAS (2), page 85-88. IEEE, (2002)Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics., , and . APCCAS, page 756-759. IEEE, (2006)A signed integer programmable power-of-two scaler for 2n-1, 2n, 2n+1 RNS., , and . ISCAS, page 2211-2214. IEEE, (2013)A novel hybrid pass logic with static CMOS output drive full-adder cell., , and . ISCAS (5), page 317-320. IEEE, (2003)A Low Power Diode-Clamped Inverter-Based Strong Physical Unclonable Function for Robust and Lightweight Authentication., , and . IEEE Trans. on Circuits and Systems, 65-I (11): 3864-3873 (2018)Reliable and Modeling Attack Resistant Authentication of Arbiter PUF in FPGA Implementation With Trinary Quadruple Response., , and . IEEE Trans. Information Forensics and Security, 14 (4): 1109-1123 (2019)Emerging Attacks and Solutions for Secure Hardware in the Internet of Things., , , and . IEEE Trans. Dependable Sec. Comput., 16 (3): 373-375 (2019)