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An Executable Analytical Performance Evaluation Approach for Early Performance Prediction.

, , , , , and . IPDPS, page 268. IEEE Computer Society, (2003)

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Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory., , , and . International Journal of Parallel Programming, 28 (1): 1-46 (2000)Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops., , , and . CGO, page 175-188. IEEE Computer Society, (2004)A Register Pressure Sensitive Instruction Scheduler for Dynamic Issue Processors., , , and . IEEE PACT, page 78-89. IEEE Computer Society, (1997)HAShCache: Heterogeneity-Aware Shared DRAMCache for Integrated Heterogeneous Systems., and . TACO, 14 (4): 51:1-51:26 (2017)A Large Context Multithreaded Architecture., and . CONPAR, volume 634 of Lecture Notes in Computer Science, page 423-428. Springer, (1992)An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams., , , and . IPPS/SPDP, page 168-175. IEEE Computer Society, (1998)ANATOMY: an analytical model of memory system performance., , , and . SIGMETRICS, page 505-517. ACM, (2014)An Experimental Study of an ILP-based Exact Solution Method for Software Pipelining., , and . LCPC, volume 1033 of Lecture Notes in Computer Science, page 16-30. Springer, (1995)Instruction Scheduling.. The Compiler Design Handbook, CRC Press, (2002)A Comprehensive Analytical Performance Model of DRAM Caches., , and . ICPE, page 157-168. ACM, (2015)