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Quick On-Chip Self- and Mutual-Inductance Screen., , and . ISQED, page 513-. IEEE Computer Society, (2000)Clocktree RLC Extraction with Efficient Inductance Modeling., , , , and . DATE, page 522-526. IEEE Computer Society / ACM, (2000)Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion., , , , , , , and . IEEE Trans. VLSI Syst., 10 (6): 799-805 (2002)Fast Generation of Statistically-based Worst-Case Modeling of On-Chip Interconnect., , , , and . ICCD, page 720-725. IEEE Computer Society, (1997)Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion., , , , , , and . ISQED, page 185-190. IEEE Computer Society, (2001)Full Chip Thermal Simulation., , , , , , and . ISQED, page 145-150. IEEE Computer Society, (2000)Ramp Up/Down Functional Unit to Reduce Step Power., , , , , and . PACS, volume 2008 of Lecture Notes in Computer Science, page 13-24. Springer, (2000)Instruction Prediction for Step Power Reduction., , , , , and . ISQED, page 211-216. IEEE Computer Society, (2001)A Scaling Scheme and Optimization Methodology for Deep Sub-Micron Interconnect., , , and . ICCD, page 320-325. IEEE Computer Society, (1996)