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Disambiguation of "Madoglio, Paolo"

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A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS.

, , , , , , , , , , , and . ISSCC, page 168-170. IEEE, (2012)

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PD Dr. Paolo Malgaretti University of Stuttgart

Paolo Carlo Danesini University of Stuttgart

 

Other publications of authors with the same name

Quantization Effects in All-Digital Phase-Locked Loops., , , , and . IEEE Trans. on Circuits and Systems, 54-II (12): 1120-1124 (2007)A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS., , , , , , , , , and 2 other author(s). ISSCC, page 168-170. IEEE, (2012)A 4.75-GHz Fractional Frequency Divider-by-1.25 With TDC-Based All-Digital Spur Calibration in 45-nm CMOS., , and . J. Solid-State Circuits, 44 (12): 3422-3433 (2009)A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS., , , , , , , , , and 3 other author(s). J. Solid-State Circuits, 47 (12): 3184-3196 (2012)A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique., , , , , , , and . J. Solid-State Circuits, 48 (7): 1721-1729 (2013)A digital fractional-N PLL with a 3mW 0.004mm2 6-bit PVT and mismatch insensitive TDC., , , , , , and . ESSCIRC, page 193-196. IEEE, (2012)A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving., , , , , , and . J. Solid-State Circuits, 45 (7): 1410-1420 (2010)AD-PLL for WiMAX with Digitally-Regulated TDC and Glitch Correction Logic., , , , , and . EURASIP J. Emb. Sys., (2010)A 4.75GHz fractional frequency divider with digital spur calibration in 45nm CMOS., , and . ISSCC, page 226-227. IEEE, (2009)A 32nm CMOS all-digital reconfigurable fractional frequency divider for LO generation in multistandard SoC radios with on-the-fly interference management., , , , and . ISSCC, page 352-354. IEEE, (2012)