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Disambiguation of "Alvandpour, Atila"

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A 0.5-V 250-nW 65-dB SNDR passive ΔΣ modulator for medical implant devices.

, and . ISCAS, page 2010-2013. IEEE, (2013)

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Other publications of authors with the same name

Introduction to the Special Issue on the 37th European Solid-State Circuits Conference (ESSCIRC)., , and . J. Solid-State Circuits, 47 (7): 1511-1514 (2012)An ultra-low-voltage OTA in 28 nm UTBB FDSOI CMOS using forward body bias., , and . NORCAS, page 1-4. IEEE, (2015)A 12.5-ENOB 10-kS/s Redundant SAR ADC in 65-nm CMOS., and . IEEE Trans. on Circuits and Systems, 63-II (3): 244-248 (2016)An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies., , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 849-858. Springer, (2004)A multi-segment clocking scheme to reduce on-chip EMI., , and . SoCC, page 251-255. IEEE, (2011)A low clock load conditional flip-flop., and . SoCC, page 169-170. IEEE, (2004)Effect of Clock Duty-Cycle Error on Two-Channel Interleaved ΔΣ DACs., , and . IEEE Trans. on Circuits and Systems, 62-II (7): 646-650 (2015)Analysis of a 5.5-V Class-D Stage Used in +30-dBm Outphasing RF PAs in 130- and 65-nm CMOS., , and . IEEE Trans. on Circuits and Systems, 59-II (11): 726-730 (2012)Low-Power DT ΔΣ Modulators Using SC Passive Filters in 65 nm CMOS., , and . IEEE Trans. on Circuits and Systems, 61-I (2): 358-370 (2014)An 11 GS/s 1.1 GHz Bandwidth Interleaved ΔΣ DAC for 60 GHz Radio in 65 nm CMOS., and . J. Solid-State Circuits, 50 (10): 2306-2318 (2015)