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A Handel-C implementation of the back-propagation algorithm on field programmable gate arrays., , and . ReConFig, IEEE Computer Society, (2005)A Genetic Algorithm Hardware Accelerator for VLSI Circuit Partitioning., , and . I. J. Comput. Appl., 12 (3): 163-180 (2005)StarPlace: A new analytic method for FPGA placement., , and . Integration, 44 (3): 192-204 (2011)A scalable pipelined architecture for real-time computation of MLP-BP neural networks., , and . Microprocessors and Microsystems - Embedded Hardware Design, 36 (2): 138-150 (2012)Design and optimization of multithreshold CMOS (MTCMOS) circuits., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 22 (10): 1324-1342 (2003)An FPGA Implementation of the LMS Adaptive Filter for Audio Processing., , and . ReConFig, page 168-175. IEEE Computer Society, (2006)Corrigendum to "Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm"., , and . Int. J. Reconfig. Comp., (2018)Comparing Classifiers in Historical Census Linkage., , , , , and . ICDM Workshops, page 1086-1094. IEEE Computer Society, (2014)GBSA: A group based search algorithm for packet classification., and . IWCMC, page 1789-1794. IEEE, (2011)A Fast Hierarchical Approach to FPGA Placement., , , and . ESA/VLSI, page 497-503. CSREA Press, (2004)