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Efficient Process-in-Memory Architecture Design for Unsupervised GAN-based Deep Learning using ReRAM.

, , and . ACM Great Lakes Symposium on VLSI, page 423-428. ACM, (2019)

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DPATCH: An Adversarial Patch Attack on Object Detectors., , , , , and . SafeAI@AAAI, volume 2301 of CEUR Workshop Proceedings, CEUR-WS.org, (2019)PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning., , , and . HPCA, page 541-552. IEEE Computer Society, (2017)Atomlayer: a universal reRAM-based CNN accelerator with atomic layer computation., , , , and . DAC, page 103:1-103:6. ACM, (2018)GraphR: Accelerating Graph Processing Using ReRAM., , , , and . CoRR, (2017)ZARA: A Novel Zero-free Dataflow Accelerator for Generative Adversarial Networks in 3D ReRAM., , , and . DAC, page 133. ACM, (2019)A spiking neuromorphic design with resistive crossbar., , , , , , , , , and . DAC, page 14:1-14:6. ACM, (2015)Spiking-based matrix computation by leveraging memristor crossbar array., , , , , , , , , and . CISDA, page 1-4. IEEE, (2015)Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication., , , , , and . FPGA, page 65-77. ACM, (2022)Efficient Process-in-Memory Architecture Design for Unsupervised GAN-based Deep Learning using ReRAM., , and . ACM Great Lakes Symposium on VLSI, page 423-428. ACM, (2019)HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Array., , , , , and . HPCA, page 56-68. IEEE, (2019)