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Dr. Liwei Fu University of Stuttgart

Nanofabrication results of a novel cascaded plasmonic superlens : lessons learned, , , and . Modeling Aspects in Optical Metrology VI, 10330, page 103300Y. Bellingham, SPIE, (2017)
Nanofabrication results of a novel cascaded plasmonic superlens : lessons learned, , , and . Modeling Aspects in Optical Metrology VI, 10330, page 103300Y. Bellingham, SPIE, (2017)A cascaded plasmonic superlens for near field imaging with magnification, , , and . Modeling Aspects in Optical Metrology V, 9526, page 95260Z. Bellingham, SPIE, (2015)A silicon superlens with a simple design working at visible wavelengths, , , and . Optical Micro- and Nanometrology VI, 9890, page 98900I. Bellingham, SPIE, (2016)
 

Other publications of authors with the same name

Adaptive Pipeline voltage Scaling in High Performance Microprocessor., , , and . Journal of Circuits, Systems, and Computers, 19 (8): 1817-1834 (2010)SBA: a server-initiated playback scheme supporting variable bit rate control., and . IEEE Trans. Consumer Electronics, 45 (1): 210-218 (1999)Efficient segment-based video transcoding proxy for mobile multimedia services., and . Journal of Systems Architecture, 53 (11): 833-845 (2007)Flexible Heterogeneous Multicore Architectures for Versatile Media Processing Via Customized Long Instruction Words., , and . IEEE Trans. Circuits Syst. Video Techn., 15 (5): 659-672 (2005)17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time., , , , , , , , , and 1 other author(s). ISSCC, page 1-3. IEEE, (2015)Variation-aware and adaptive-latency accesses for reliable low voltage caches., , , , , , , , and . VLSI-SoC, page 358-363. IEEE, (2013)A configurable bus-tracer for error reproduction in post-silicon validation., , , and . VLSI-DAT, page 1-4. IEEE, (2013)Efficient Segment-Based Video Transcoding Proxy for Mobile Multimedia Services., , and . ICME, page 755-758. IEEE Computer Society, (2005)A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT., , , and . ISCAS (2), page 769-772. IEEE, (2004)Cross-matching caches: Dynamic timing calibration and bit-level timing-failure mask caches to reduce timing discrepancies with low voltage processors., , , , , and . Integration, (2016)