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Enhanced read performance for phase change memory using a reference column.

, , , , , , , , and . IEICE Electronic Express, 14 (5): 20170032 (2017)

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Memory characteristics of double-layer metal and semiconductor heterogeneous nanocrystals embedded in SiO2., , , and . NEMS, page 672-675. IEEE Computer Society, (2009)A 40-nm 16-Mb Contact-Programming Mask ROM Using Dual Trench Isolation Diode Bitcell., , , , , , , and . IEEE Trans. VLSI Syst., 24 (4): 1333-1341 (2016)Enhanced read performance for phase change memory using a reference column., , , , , , , , and . IEICE Electronic Express, 14 (5): 20170032 (2017)Methods to speed up read operation in a 64 Mbit phase change memory chip., , , , , , , , and . IEICE Electronic Express, 12 (20): 20150792 (2015)An FPGA enhanced extensible and parallel query storage system for emerging NVRAM., , , , , , , and . IEICE Electronic Express, 13 (4): 20151109 (2016)A snake addressing scheme for phase change memory testing., , , , , , and . SCIENCE CHINA Information Sciences, 59 (10): 102401 (2016)A novel non-volatile memory storage system for I/O-intensive applications., , , , , , and . Frontiers of IT & EE, 19 (10): 1291-1302 (2018)A three-dimensional numerical simulator of phase-change memory by random nucleation and growth approach., , , , and . NVMTS, page 1-4. IEEE, (2015)Design and security evaluation of PCM-based rPUF using cyclic refreshing strategy., , , , and . IEICE Electronic Express, 15 (10): 20180239 (2018)Understanding the crystallization mechanism of Ge-Te-Ti phase change material., , , , and . NVMTS, page 1-4. IEEE, (2015)