Author of the publication

High performance comparison-based sorting algorithm on many-core GPUs.

, , , , and . IPDPS, page 1-10. IEEE, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Low Execution Efficiency: When General Multi-core Processor Meets Wireless Communication Protocol., , , , , , and . HPCC/EUC, page 906-913. IEEE, (2013)GVE: Godson-T Verification Engine for many-core architecture rapid prototyping and debugging., , , , and . FPT, page 253-256. IEEE, (2010)Auto-Tuning GEMV on Many-Core GPU., , , , , , , and . ICPADS, page 30-36. IEEE Computer Society, (2012)Extendable pattern-oriented optimization directives., , , , , and . CGO, page 107-118. IEEE Computer Society, (2011)Corrigendum to "Fast and scalable lock methods for video coding on many-core architecture" J. Visual Communication and Image Representation 25(7) (2014) 1758-1762., , , , , , , , and . J. Visual Communication and Image Representation, (2015)P-GAS: Parallelizing a Cycle-Accurate Event-Driven Many-Core Processor Simulator Using Parallel Discrete Event Simulation., , , , , and . PADS, page 89-96. IEEE Computer Society, (2010)Efficient Parallelization of a Protein Sequence Comparison Algorithm on Manycore Architecture., , , and . PDCAT, page 167-170. IEEE Computer Society, (2008)POSTER: An Optimization of Dataflow Architectures for Scientific Applications., , , , , , and . PACT, page 441-442. ACM, (2016)Energy-Performance Modeling and Optimization of Parallel Computing in On-Chip Networks., , , , and . TrustCom/ISPA/IUCC, page 879-886. IEEE Computer Society, (2013)A Quantitative Study of the On-Chip Network and Memory Hierarchy Design for Many-Core Processor., , , , and . ICPADS, page 689-696. IEEE Computer Society, (2008)