Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors., , , and . IEEE Trans. VLSI Syst., 22 (10): 2117-2130 (2014)Predicting the future of information technology and society [The Road Ahead].. IEEE Design & Test of Computers, 29 (6): 101-102 (2012)Scaling: More than Moore's law.. IEEE Design & Test of Computers, 27 (3): 86-87 (2010)Delay uncertainty and signal criticality driven routing channel optimization for advanced DRAM products., , , and . ASP-DAC, page 697-704. IEEE, (2016)An analytical delay model for RLC interconnects., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (12): 1507-1514 (1997)Gate-length biasing for runtime-leakage control., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (8): 1475-1485 (2006)Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (4): 464-471 (2004)A general framework for vertex orderings with applications to circuit clustering., and . IEEE Trans. VLSI Syst., 4 (2): 240-246 (1996)Performance-Driven Global Routing for Cell Based ICs., , , , and . ICCD, page 170-173. IEEE Computer Society, (1991)Revisiting 3DIC Benefit with Multiple Tiers., , and . SLIP, page 6:1-6:8. ACM, (2016)