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Disambiguation of "Martins, Rui P."

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Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor.

, , , and . J. Solid-State Circuits, 53 (11): 3232-3242 (2018)

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Rui Wang University of Stuttgart

Chantal Ruiz University of Stuttgart

P. Hommel

P. Abegglen

P. Krasteva

 

Other publications of authors with the same name

Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area., , , , and . IEEE Trans. VLSI Syst., 26 (11): 2279-2289 (2018)Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications., , , , , and . IEEE Trans. VLSI Syst., 27 (1): 69-82 (2019)A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging., , and . J. Solid-State Circuits, 54 (9): 2579-2589 (2019)A 550- $\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS., , , , and . J. Solid-State Circuits, 54 (4): 1161-1172 (2019)A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB., , , , , and . IEEE Trans. on Circuits and Systems, 66-II (1): 71-75 (2019)A 0.19 mm2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS., , , , , and . IEEE Trans. on Circuits and Systems, 65-I (11): 3606-3616 (2018)A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur., , , , and . ISSCC, page 270-272. IEEE, (2019)A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications., , and . ISCAS, page 1-5. IEEE, (2018)A Dual-Loop Digital LDO Regulator with Asynchronous-Flash Binary Coarse Tuning., , , and . ISCAS, page 1-5. IEEE, (2018)A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm2., , , and . ISSCC, page 422-424. IEEE, (2018)