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Disambiguation of "Matsumoto, Kazuya"

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Application of a communication-avoiding generalized minimal residual method to a gyrokinetic five dimensional eulerian code on many core platforms.

, , , , , , and . ScalA@SC, page 7:1-7:8. ACM, (2017)

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Other publications of authors with the same name

Implementing a Code Generator for Fast Matrix Multiplication in OpenCL on the GPU., , and . MCSoC, page 198-204. IEEE Computer Society, (2012)Blocked All-Pairs Shortest Paths Algorithm for Hybrid CPU-GPU System., , and . HPCC, page 145-152. IEEE, (2011)Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture., , , , , , and . CLUSTER, page 88-91. IEEE Computer Society, (2015)Performance Tuning of Matrix Multiplication in OpenCL on Different GPUs and CPUs., , and . SC Companion, page 396-405. IEEE Computer Society, (2012)Effectiveness of performance tuning techniques for general matrix multiplication on the PEZY-SC2., , and . HEART, page 8:1-8:6. ACM, (2019)Application of a communication-avoiding generalized minimal residual method to a gyrokinetic five dimensional eulerian code on many core platforms., , , , , , and . ScalA@SC, page 7:1-7:8. ACM, (2017)Blocked United Algorithm for the All-Pairs Shortest Paths Problem on Hybrid CPU-GPU Systems., , and . IEICE Transactions, 95-D (12): 2759-2768 (2012)Implementation and Evaluation of NAS Parallel CG Benchmark on GPU Cluster with Proprietary Interconnect TCA., , , and . VECPAR, volume 10150 of Lecture Notes in Computer Science, page 135-145. Springer, (2016)Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication., , , , and . IPDPS Workshops, page 647-655. IEEE Computer Society, (2015)Matrix Multiply-Add in Min-plus Algebra on a Short-Vector SIMD Processor of Cell/B.E.., and . ICNC, page 272-274. IEEE Computer Society, (2010)