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A Novel R-C Combination Based Pseudo-differential SAR A/D Converter in 90nm CMOS Process.

, , , , and . PACCS, page 289-292. IEEE Computer Society, (2009)

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A Novel R-C Combination Based Pseudo-differential SAR A/D Converter in 90nm CMOS Process., , , , and . PACCS, page 289-292. IEEE Computer Society, (2009)Novel hybrid D/A structures for high-resolution SAR ADCs - analysis, modeling and realization., , , and . Microelectronics Journal, 42 (7): 929-935 (2011)Multichannel Wireless Neural Recording AFE Architectures: Analysis, Modeling, and Tradeoffs., and . IEEE Design & Test, 33 (4): 24-36 (2016)A 1 V 10 bit 25 kS/s VCO-based ADC for implantable neural recording., and . BioCAS, page 1-4. IEEE, (2017)A 10-Bit 120 kS/s SAR ADC Without Reset Energy for Biomedical Electronics., , , and . CSSP, 38 (12): 5411-5425 (2019)A Fully Integrated Fast-Response LDO Voltage Regulator with Adaptive Transient Current Distribution., and . ISVLSI, page 651-654. IEEE Computer Society, (2017)Low-Phase-Error Small-Area 4-Phase DLL With a Single-Ended-Differential-Single-Ended Voltage-Controlled Delay Line., , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (1): 25-29 (2022)Low-power Capacitor Arrays for Charge Redistribution SAR A-D Converter in 65nm CMOS., , and . PACCS, page 293-296. IEEE Computer Society, (2009)A 0.6 V 10 bit 120 kS/s SAR ADC for implantable multichannel neural recording., and . BioCAS, page 1-4. IEEE, (2017)Improved Switching Energy Reduction Approach in Low-Power SAR ADC for Bioelectronics., and . VLSI Design, (2016)