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A practical FPGA-based framework for novel CMP research., , , , , , and . FPGA, page 116-125. ACM, (2007)Tainting is not pointless., , and . Operating Systems Review, 44 (2): 88-92 (2010)IX: A Protected Dataplane Operating System for High Throughput and Low Latency., , , , , and . OSDI, page 49-65. USENIX Association, (2014)Storage I/O generation and replay for datacenter applications., , , and . ISPASS, page 123-124. IEEE Computer Society, (2011)Evaluating Bufferless Flow Control for On-chip Networks., , , and . NOCS, page 9-16. IEEE Computer Society, (2010)Implementing and Evaluating a Model Checker for Transactional Memory Systems., , , and . ICECCS, page 117-126. IEEE Computer Society, (2010)Register pointer architecture for efficient embedded processors., , , , , and . DATE, page 600-605. EDA Consortium, San Jose, CA, USA, (2007)QoS-Aware Admission Control in Heterogeneous Datacenters., , and . ICAC, page 291-296. USENIX Association, (2013)HRL: Efficient and flexible reconfigurable logic for near-data processing., and . HPCA, page 126-137. IEEE Computer Society, (2016)From chaos to QoS: case studies in CMP resource management., , , , , , , and . SIGARCH Computer Architecture News, 35 (1): 21-30 (2007)