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In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults.

W. Xu, J. Wang, Y. Hu, J. Lee, F. Gong, L. He, and M. Sarrafzadeh. IEEE Trans. on Circuits and Systems, 58-I (6): 1372-1381 (2011)

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Moosung Lee University of Stuttgart

Dongwon Lee University of Stuttgart

Junghwa Lee University of Stuttgart

Ph. D. Benjamin Lee University of Stuttgart

Mathias Jung University of Stuttgart

Other publications of authors with the same name

In-place LUT polarity inVersion to mitigate soft errors for FPGAs.J. Su, J. Lee, C. Wu, and L. He. DFT, page 81-86. IEEE Computer Society, (2016)Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.N. Jing, J. Lee, Z. Feng, W. He, Z. Mao, S. Wen, R. Wong, and L. He. FPL, page 282-285. IEEE Computer Society, (2011)Low power scheduling method using multiple supply voltages.K. Tsai, J. Lee, S. Ruan, and F. Lai. ISCAS, IEEE, (2006)Fault modeling and characteristics of SRAM-based FPGAs (abstract only).N. Jing, J. Lee, C. Zhang, J. Tong, Z. Mao, and L. He. FPGA, page 279. ACM, (2011)In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults.W. Xu, J. Wang, Y. Hu, J. Lee, F. Gong, L. He, and M. Sarrafzadeh. IEEE Trans. on Circuits and Systems, 58-I (6): 1372-1381 (2011)SEU fault evaluation and characteristics for SRAM-based FPGA architectures and synthesis algorithms.N. Jing, J. Lee, Z. Feng, W. He, Z. Mao, and L. He. ACM Trans. Design Autom. Electr. Syst., 18 (1): 13:1-13:18 (2012)In-place decomposition for robustness in FPGA.J. Lee, Z. Feng, and L. He. ICCAD, page 143-148. IEEE, (2010)Mitigating FPGA interconnect soft errors by in-place LUT inversion.N. Jing, J. Lee, W. He, Z. Mao, and L. He. ICCAD, page 582-586. IEEE Computer Society, (2011)RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications.S. Luckenbill, J. Lee, Y. Hu, R. Majumdar, and L. He. DATE, page 783-788. IEEE, (2010)Simultaneous test pattern compaction, ordering and X-filling for testing power reduction.J. Lee, Y. Hu, R. Majumdar, and L. He. ISQED, page 702-707. IEEE Computer Society, (2009)

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Disambiguation of "Lee, Ju-Yueh"

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In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults.

Please choose a person to relate this publication to

Moosung Lee University of Stuttgart

Dongwon Lee University of Stuttgart

Junghwa Lee University of Stuttgart

Ph. D. Benjamin Lee University of Stuttgart

Mathias Jung University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Lee, Ju-Yueh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults.

Please choose a person to relate this publication to

Moosung Lee University of Stuttgart

Dongwon Lee University of Stuttgart

Junghwa Lee University of Stuttgart

Ph. D. Benjamin Lee University of Stuttgart

Mathias Jung University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults.