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Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers.

B. Yuce, H. Ugurdag, S. Gören, and G. Dündar. IEEE Trans. Computers, 63 (8): 1868-1881 (2014)

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Real Time Wireless Packet Monitoring with Raspberry Pi Sniffer.Y. Turk, O. Demir, and S. Gören. ISCIS, page 185-192. Springer, (2014)FPGA Based Particle Identification in High Energy Physics Experiments.H. Ugurdag, A. Basaran, T. Akdogan, V. Güney, and S. Gören. ASAP, page 181-184. IEEE Computer Society, (2012)Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration.S. Gören, O. Ozkurt, A. Yildiz, H. Ugurdag, R. Chakraborty, and D. Mukhopadhyay. Computers & Electrical Engineering, 39 (2): 386-397 (2013)Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension.A. Varici, G. Saglam, S. Ipek, A. Yildiz, S. Gören, A. Aysu, D. Iskender, T. Aktemur, and H. Ugurdag. EWDTS, page 1-5. IEEE, (2019)Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression.A. Kakacak, A. Guzel, O. Cihangir, S. Gören, and H. Ugurdag. Integration, (2017)Optimization of Embedded Controllers Based on Redundant Transition Removal and Fault Simulation Using k-WISE Tests.S. Gören. Journal of Circuits, Systems, and Computers, 18 (4): 647-663 (2009)Tools and Techniques for Implementation of Real-time Video Processing Algorithms.V. Levent, A. Guzel, M. Tosun, M. Büyükmihçi, F. Aydin, S. Gören, C. Erbas, T. Akgün, and H. Ugurdag. Signal Processing Systems, 91 (1): 93-113 (2019)Efficient Combinational Circuits for Division by Small Integer Constants.H. Ugurdag, A. Bayram, V. Levent, and S. Gören. ARITH, page 1-7. IEEE Computer Society, (2016)Fault attack on AES via hardware Trojan insertion by dynamic partial reconfiguration of FPGA over ethernet.A. Johnson, S. Saha, R. Chakraborty, D. Mukhopadhyay, and S. Gören. WESS, page 1:1-1:8. ACM, (2014)Defect-Tolerant Logic Mapping for Nanocrossbars Based on Two-Dimensional Sort.S. Gören, H. Ugurdag, and O. Palaz. ISCIS, volume 62 of Lecture Notes in Electrical Engineering, page 399-404. Springer, (2010)

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Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers.

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Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers.