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Disambiguation of "Asadi, Hossein"

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Introduction: Special Section on Architecture of Future Many Core Systems.

, , and . Microprocessors and Microsystems - Embedded Hardware Design, (2016)

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Other publications of authors with the same name

Low-Cost Scan-Chain-Based Technique to Recover Multiple Errors in TMR Systems., , , and . IEEE Trans. VLSI Syst., 21 (8): 1454-1468 (2013)Obtaining FPGA soft error rate in high performance information systems., , , and . Microelectronics Reliability, 49 (5): 551-557 (2009)A Fast Analytical Approach to Multi-cycle Soft Error Rate Estimation of Sequential Circuits., , , and . DSD, page 797-800. IEEE Computer Society, (2010)Soft Error Modeling and Protection for Sequential Elements., and . DFT, page 463-474. IEEE Computer Society, (2005)Layout-Based Modeling and Mitigation of Multiple Event Transients., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (3): 367-379 (2016)Towards dark silicon era in FPGAs using complementary hard logic design., , , , and . FPL, page 1-6. IEEE, (2014)LBICA: A Load Balancer for I/O Cache Architectures., , and . CoRR, (2018)An Analytical Model for Performance and Lifetime Estimation of Hybrid DRAM-NVM Main Memories., , and . CoRR, (2019)LBICA: A Load Balancer for I/O Cache Architectures., , and . DATE, page 1196-1201. IEEE, (2019)A Hybrid Non-Volatile Cache Design for Solid-State Drives Using Comprehensive I/O Characterization., , , , and . IEEE Trans. Computers, 65 (6): 1678-1691 (2016)