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Disambiguation of "Hamashita, Koichi"

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Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs.

, , , , , and . ISSCC, page 282-283. IEEE, (2013)

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Other publications of authors with the same name

A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays., , , , , , , and . ESSCIRC, page 221-224. IEEE, (2015)A self-calibrated 2-1-1 cascaded continuous-time ΔΣ modulator., , , , and . CICC, page 9-12. IEEE, (2009)A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR., , , , , , and . ISSCC, page 494-495. IEEE, (2008)An Oversampling Stochastic ADC Using VCO-Based Quantizers., , , and . IEEE Trans. on Circuits and Systems, 65-I (12): 4037-4050 (2018)A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity., , , , , and . J. Solid-State Circuits, 49 (2): 416-425 (2014)A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, -98 dB THD, and 79 dB SNDR., , , , , , and . J. Solid-State Circuits, 43 (12): 2601-2612 (2008)A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer., , , , , , and . CICC, page 1-4. IEEE, (2010)Direct-digital modulation (DIDIMO) transmitter with -156dBc/Hz Rx-band noise using FIR structure., , , , and . ESSCIRC, page 53-56. IEEE, (2012)Low-OSR Over-Ranging Hybrid ADC Incorporating Noise-Shaped Two-Step Quantizer., , , , and . J. Solid-State Circuits, 46 (11): 2458-2468 (2011)A 61.5dB SNDR pipelined ADC using simple highly-scalable ring amplifiers., , , , , and . VLSIC, page 32-33. IEEE, (2012)