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FPGA education and research activities in Taiwan., , , , and . FPT, page 445-448. IEEE, (2002)Strengthening Modern Electronics Industry Through the National Program for Intelligent Electronics in Taiwan., , , , , and . IEEE Access, (2013)A Low Power Differential Cascode Voltage Switch with Pass Gate Pulsed Latch for Viterbi Decoder., , , , and . J. Low Power Electronics, 6 (4): 551-562 (2010)A Low Voltage All-Digital On-Chip Oscillator Using Relative Reference Modeling., , and . IEEE Trans. VLSI Syst., 20 (9): 1615-1620 (2012)A Sub-10-muhboxW Digitally Controlled Oscillator Based on Hysteresis Delay Cell Topologies for WBAN Applications., , and . IEEE Trans. on Circuits and Systems, 57-II (12): 951-955 (2010)Jointly Designed Nonbinary LDPC Convolutional Codes and Memory-Based Decoder Architecture., , , and . IEEE Trans. on Circuits and Systems, 62-I (10): 2523-2532 (2015)An Indexed-Scaling Pipelined FFT Processor for OFDM-Based WPAN Applications., , , , and . IEEE Trans. on Circuits and Systems, 55-II (2): 146-150 (2008)Buffer size optimization for full-search block matching algorithms., and . ASAP, page 76-85. IEEE Computer Society, (1997)Semi-systolic array based motion estimation processor design., and . ICASSP, page 3299-3302. IEEE Computer Society, (1995)An In/Post-Loop Deblocking Filter With Hybrid Filtering Schedule., , and . IEEE Trans. Circuits Syst. Video Techn., 17 (7): 937-943 (2007)