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Disambiguation of "Mishra, Prabhat"

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Trace Buffer Attack: Security versus observability study in post-silicon debug.

, , and . VLSI-SoC, page 355-360. IEEE, (2015)

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Rishikeya Mishra University of Stuttgart

 

Other publications of authors with the same name

Dynamic Cache Tuning for Efficient Memory Based Computing in Multicore Architectures., , and . VLSI Design, page 49-54. IEEE Computer Society, (2013)Processor-Memory Co-Exploration driven by a Memory-Aware Architecture Description Language., , , and . VLSI Design, page 70-75. IEEE Computer Society, (2001)Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study., , , and . MTV, page 33-36. IEEE Computer Society, (2006)Dynamic Selection of Trace Signals for Post-Silicon Debug., , , , and . MTV, page 62-67. IEEE Computer Society, (2013)Test Generation for Hybrid Systems Using Clustering and Learning Techniques., and . VLSI Design, page 589-590. IEEE Computer Society, (2016)Guest Editors' Introduction: Multicore SoC Validation with Transaction-Level Models., , and . IEEE Design & Test of Computers, 28 (3): 6-9 (2011)A Top-Down Methodology for Microprocessor Validation., , , and . IEEE Design & Test of Computers, 21 (2): 122-131 (2004)Functional Coverage Driven Test Generation for Validation of Pipelined Processors., and . DATE, page 678-683. IEEE Computer Society, (2005)Efficient test case generation for validation of UML activity diagrams., , and . Design Autom. for Emb. Sys., 14 (2): 105-130 (2010)Functional verification of programmable embedded architectures - a top-down approach., and . Springer, (2005)